MDC - 2 : Computer
Organization and Architecture
Name of Program |
Name of course |
Course Code |
Total Teaching Hours |
Weekly Credits |
Total Credits |
B.C.A. |
Computer Organization and Architecture |
MDC-2 |
Theory-60 |
Theory4 credit |
4 |
Objective:
·
To understand about
basic physical components of computer
·
To understand digital
components of computer
·
To learn digital
aspects of processing
·
To understand how digital logic circuits work
Outcomes:
·
Gaining understanding about physical and logical components of computer
·
To be able to draw and
analyse various digital
circuits
·
Having understanding about CPU,
Input output peripherals and memory organization
UNIT |
|
Hours |
1 |
Digital Logic
Circuits ·
Block diagram of Digital
Computers o Above
gates with graphic symbol, algebraic function and truth table ·
Boolean Algebra Boolean Function, truth table, logic diagram, Boolean
expression, Basic identities
ofBoolean algebra, DeMorgans Theorem, Complement of a function, simplification ofBoolean expression using Boolean
algebra ·
Map Simplification minterms, adjacent squares, two, three and four variable function simplification,product of sum simplification, NAND and NOR |
12 |
|
implementation, Don’t care conditions,example of map simplification using two,
three and four variable, sum of productconcept |
|
2 |
Combinational circuits, Flip flop and Sequential circuits ·
Combinational Circuit o
Block diagram of Combinational Circuit o analysis
and design of combinational circuit like Half Adder
and Full Adder ·
Flip Flops o
Concept of Clock
pulse o
SR Flip-flop o
D Flip-flop o
JK Flip-flop o
T Flip-flop o
Edge-Triggered o
Master-slave Flip-flop o
Excitation table of Flip-flop ·
Sequential Circuit o
Concept and meaning of Sequential circuit o
Flip-flop Input equation o
State table o
State diagram o
example of Designing of different sequential circuit |
12 |
3 |
Digital Components ·
Integrated circuits Concept of IC, SSI, MSI, LSI, VLSI,
TTL, ECL, MOS, CMOS ·
Decoders Concept of decoder, 2 to 4 line decoder, 3 to 8 line decoder, decoder with enable input,NAND gate decoder,
Decoder expansion ·
Encoders Concept of
encoder, Octal to binary
encoder ·
Multiplexer Concept
of Multiplexer, 2 to 1 line multiplexer, 4 to 1 line multiplexer, quadruple 2 to 1line multiplexer ·
De-multiplexer: Concept of De-Multiplexer: 1 to 4 line
de-multiplexer ·
Register Concept
of Register, loading of register, 4-bit register, register with parallel load, shiftregister, bidirectional shift register with parallel load, ·
Counter Concept of Binary counter,
4-bit synchronous binary counter,
4-bit binary counter withparallel load |
12 |
4 |
Central Processing Unit: ·
Introduction of CPU ·
Major components of CPU ·
Concept of different Computer register |
12 |
|
·
Registers for the Basic Computer (DR, AR, AC, IR, PC, TR, INPR,
OUTR) ·
Register symbol, name,
number of bits
and function is brief ·
General Register Organization o
Control word ·
Stack Organization: o
Register stack o
Memory stack o
Polish Notation ·
Reverse Polish Notation |
|
5 |
Input-Output Organization and Memory Organization: Input-Output Organization ·
IO Interface o
Concept of I/O
interface o
I/O Bus and Interface modules ·
I/O versus Memory
Bus, example of I/O
interface unit ·
DMA o
Concept of DMA § bus request § bus grant § burst transfer § cycle stealing o
DMA Controller o
DMA transfer ·
IOP o
Concept of IOP o
I/O processing o
block diagram of computer with I/O processor Memory Organization ·
Memory Hierarchy o
Memory hierarchy in a
computer system ·
Only brief concept of o
Auxiliary memory o
cache memory o
Main Memory o
Bootstrap loader o
computer start-up ·
RAM and Rom Chips ·
Typical RAM chip
block diagram and function table ·
Typical ROM chip block
diagram |
12 |